● Mates with user's PCB to form a C or D-size module. The quickest way to make a VXI module. ● A complete VXI-1 Rev 1.4 and VXI-2 compliant register-based interface. High speed VXIbus interface that meets the latest VXIbus specifications. ● User interface includes 48 I/O signals, a VXI expansion bus, TTL Triggers and VXI interrupt capability. Supports virtually any kind of user circuit or function. ● User configureable model number, manufacturer ID, version and serial numbers. Identifies the finished module as your product. ● Two companion component boards available for prototype modules. No need to layout prototype boards. ● Companion hardware kits available for building 1, 2 or 3-slot wide modules. Complete hardware support for all width C-size modules.
ICS Register Basted Interface Card VXI-5524 is a low-cost VXI Interface for connecting virtually any kind of a circuit to the VXIbus. It is a register-based VXI Interface with enough on-board logic for most applications.
ICS Register Basted Interface Card VXI-5524 has 48 digital I/O signals to directly control simple circuits or read-back data values and a 16-bit VXI data expansion bus for more complex circuitry.
Includes VXI-2 Version, Serial Number,
Interrupt and Subclass Registers
Diagnostic Capability
Power-on self test
Built-in diagnostic routines
Four LEDs for VXI status and trouble-shooting
Controls and Indicators
Indicators
Four LEDs showing the state of the VXIbus
interface and VXI-5524's logic.
RDY
On after self test
ACCESS
On when address recognized
FAIL
On when seltest failed
SYSFAIL
VXIbus SysFail signal line
Interface Specifications
Parallel Date Lines
48 TTL/CMOS latched data lines with 33 KΩ pullups, 20 mA source and 40 mA sink capability. Data line direction set in 16-bit increments. Control lines include input handshake lines and output data strobe. User configuration saved in E2ROM and recalled at power turn-on.
Expansion Bus
16 data lines, 4 address lines, strobe and write lines. Expansion bus address range is 20 to 38 HEX. All signals have 20 mA source and 40 mA sink capability.
Triggers
VXI TTLTRG lines selected in pairs.
TTL tigger input pulse. 3 mA source, 20 mA sink capability. Pulse waveform identical to the selected VXIbus TTLTRG line. May be linked to TTLTRG lines 0, 2, 4 or 6.
