● Provides a user-definable, 40-line parallel interface with bit, byte, pulse, string and binary data transfer capabilities. Fully configurable to the user's needs by bus commands. ● Signal monitor feature allows the 4803 to detect signal changes on 15 inputs. Relieves controller of time consuming polling operation. ● High-current drivers and input pullup resistors. Drives more devices, longer lines and inputs CMOS signals or switch contacts. ● IEEE-488.2 compatible unit uses SCPI commands and Short Form commands. Includes latest GPIB program advances. ● Device configuration, user's IDN message and bus address stored in Flash. Stored setup eliminates program initialization statements. ● Lock feature prevents accidental loss or change of user configuration. Protects your configuration and IDN message. ● Interchangeable with ICS's 2303 Serial and 8003 Ethernet (LAN) to digital boards. Easy conversion path.
The Model 4803 GPIB <-> Digital Interface Board is an IEEE-488.2/GPIB to digital interface with 40 I/O lines that can be used to easily adapt devices with digital signals to the IEEE-488/GPIB/HP-IP bus. In a typical application, the ICS GPIB to Parallel Digital Interface Board 4803 is located inside the device and is powered by the device's +5 volt power supply. All signal connections can be made with plug-in flat ribbon cables that directly connect to the GPIB and digital headers on the 4803. When used with the companion GPIB Connector/Address Switch Board, the ICS GPIB to Parallel Digital Interface Board 4803 becomes a quick and easy way to add an IEEE-488.2 interface to most digital devices.
The ICS GPIB to Parallel Digital Interface Board 4803 includes a complete manual and a configuration disk with sample programs. A Starter kit is available that has everything a non-GPIB user needs to install a 4803 in his chassis and control it from the GPIB bus.
Dual primary addresses or single primary with secondary addresses 00 and 01. Primary address range: 0-30.
SRQ Generation
SRQs are generated if the unit is not a talker, if SRQs are enabled and if an Enabled Event Status Register bit or an monitored digital input change occurs. Digital inputs monitored by the Questionable registers.
The 4803's parallel I/O signals have the following electrical characteristics. All time delays listed here are maximums, all pulse widths are minimums.
Input Logic Levels
40 Digital I/O, 2 Status and Reset Inputs
High = > +2.0 V @ ±10 μA
Max High = 5.5 V
Low = <0.8 V @ 250 μA
with 33 Kohm pullup to +5 VDC for sensing contacts.
Input Timing
External Data Inhibit line
SETS within 1 μs of the active edge of the EDR Input signal and resets after data is loaded. Data loading time for 6 BCD/HEX characters is 0.15 ms (typ.) after the 4803 has been addressed as a Talker
Output Logic Levels
High = >3 V with 3 mA source
High =>2 V with 24 mA source
Low = 0.0 to +0.55 Vdc, 48 mA sink
Output Timing
Data is transferred to the output 0.6 to 5.3 ms after receipt of a terminator depending upon transfer method.
Pulse width 10 to 30000 ms
Data Stb
Output pulse width, 5 μs
Trigger
Output pulse width, 5 μs
Remote
Output level asserted when in the remote state
Reset
Output pulse width, 40 μs for *RST command and true during 4803 reset time (70 ms)
Stable
Output level asserted when Digital I/O lines have been configured.
SCPI Commands
Used to set and query all programmable functions. The 4803 conforms to SCPI 1994.0 Specification.
Controls and Indicators
Diagnostic Indicators
Six on board LEDs with drive signals on the DIN connector for remote LEDs
